SX Users Manual Rev. 3.1
32
© 2000 Scenix Semiconductor, Inc. All rights reserved.
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Chapter 2 Architecture
For detailed information on program counter operation, see Section 2.6.
2.4.5
STATUS (Status Register)
The STATUS register (address 03h) contains the device status bits, which are automatically set or
cleared by the device when certain events occur. The program can read this register at any time to
determine the status of the device. The format of the register is shown below, and Table 2-3 briefly
describes each of the register bit fields.
The STATUS register is a read/write register except for the TO and PD bits, which are read-only bits.
Those two bits cannot be changed by writing to the STATUS register address.
When you write to the STATUS register, it is recommended that you use the setb (set bit) and clrb
(clear bit) instructions to control the individual bits rather than mov (move) instructions to move
whole register values. This is because the CPU often modifies the STATUS register bits, possibly
resulting in register values that are different from what you expect.
PA2
PA1
PA0
TO
PD
Z
DC
C
Bit 7
Bit 0
Table 2-3 STATUS Register Bits
Status Bits
Description
PA2:PA0
Program memory page selection bits. You set or clear these bits to specify the
program memory page number for a jump or call instruction.
TO
Watchdog timeout bit. This bit is set to 1 upon power-up and cleared to 0 when a
Watchdog timeout occurs.
PD
Power Down bit. This bit is set to 1 upon power-up and cleared to 0 when the
SLEEP instruction is executed.
Z
Zero bit. This bit is set when the result of an operation is zero.
DC
Digit Carry bit. This bit is set when there is a carry out from bit 3 to bit 4 in an
addition operation and cleared when there is a borrow out from bit 3 to bit 4 in a
subtraction operation.
C
Carry bit. This bit is set when there is a carry out of bit 7 in an addition operation
and cleared when there is a borrow out of bit 7 during a subtraction operation. It is
also affected by the rotate-through-carry instructions.