© 2000 Scenix Semiconductor, Inc. All rights reserved. 41 SX User’s Manual Rev. 3.1 www.scenix.com Chapter 2 Architecture 2.6 Program Counter The program counter is an 11-bit or 12-bit register that points to the current instruction being executed
in the 2,048-word or 4,096-word program memory (depending on the SX device type). The eight low-
order bits of the program counter are directly accessible as a file register called the PC register, at
address 02h. The higher-order bits are not directly accessible, except through the STATUS register. During  regular  program  execution,  the  whole  11-bit  or  12-bit  program  counter  is  incremented
automatically once per instruction cycle. This regular sequence is altered in order to perform skips,
jumps, subroutine calls, and interrupt processing. Upon power-up or reset, the program counter is loaded with the highest program address (7FFh or
FFFh). This memory location typically contains an instruction to jump to an initialization routine. All  interrupts  cause  the  program  counter  to  be  loaded  with  000h,  the  bottom  program  address.
Therefore,  if  interrupts  are  used,  the  bottom  memory  segment  must  contain  the  interrupt  service
routine. 2.6.1 Test and Skip There are several instructions that test a condition and cause the next instruction to be skipped if the
condition is true. For example, the “SB fr.bit” instruction tests a bit in a file register and skips the next
instruction if that bit is set to 1. When a skip occurs, the program counter is incremented by two rather than one upon conclusion of the
test-and-skip instruction, and the skipped instruction (which is already being processed in the pipeline)
is canceled. There is a delay of one clock cycle caused by the skip operation. 2.6.2 Jump Absolute The “JMP addr9” instruction causes the program to jump to a new location by loading a new value into
the program counter. The lower nine bits of the new value come from a 9-bit field in the instruction
opcode.  The  upper  bits  of  the  new  value  come  from  the  PA2:PA0  bits  of  the  STATUS  register.
Therefore, the PA2:PA0 bits of the STATUS register must be pre-loaded with the desired 512-word
page number before the jump instruction is executed. For example, if the jump destination is address 7E0h in the program memory, the PA2:PA0 bits in the
STATUS register must be set to 011 before you execute the “JMP addr9” instruction. You can use the
following sequence of instructions to perform the jump: setb  $03.5 ;set bit 5 in STATUS register (PA0) setb  $03.6 ;set bit 6 in STATUS register (PA1) clrb  $03.7 ;clear bit 7 in STATUS register (PA2) jmp $1E0 ;jump to program memory address 7E0h In this example, the desired jump address is 7E0h. The lower nine bits of this address are specified by
the “JMP addr9” instruction as 1E0h, and the upper three bits are obtained from the PA2:PA0 bits (bits
7:5) in the STATUS register, which are set to 011 prior to the “jmp” instruction.