SX User’s Manual Rev. 3.1 58 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 3 Instruction Set snb STATUS.0 ;check carry bit and skip next if C=0 jmp do_carry ;jump to do_carry routine if C=1 ...
do_carry ;jump destination label ... ;program execution continues here If the carry bit is set to 1, the “jmp” instruction is executed and program execution continues where the
“do_carry” label appears in the program. The  “call”  instruction  works in  a similar manner, except  that it saves  the contents of the  program
counter before jumping to the new address. Therefore, it calls a subroutine that can be terminated by
any of several “return” instructions, as shown in the following example: ... call  add_2bytes ;call subroutine add_carry ... ;subroutine results used here add_2bytes ;subroutine label ... ;subroutine code here ret ;return from subroutine Returning from a subroutine restores the saved program counter contents, which causes program to
resume execution with the instruction immediately following the “call” instruction. A program memory address contains 12 bits (or 11 bits for the SX18/20/28AC and SX18/20/28AC75).
The “jmp” instruction specifies only the lowest nine bits of the jump address and the “call” instruction
specifies only the lowest eight bits of the call address. For information on how the device handles the
higher-order program address bits, see Section 2.6. An indirect (register-specified) jump can be accomplished by moving the desired jump address from
W to the PC register (mov $02,W). An indirect relative jump can be accomplished by adding W to the
PC register (add $02,W). Program  control  instructions  such  as  “jmp,”  “call,”  and  “ret”  alter  the  normal  program  sequence.
Therefore, when one of these instructions is executed, the execution pipeline is automatically cleared
of  pending  instructions  and  refilled  with  new  instructions,  starting  at  the  new  program  address.
Because the pipeline must be cleared, multiple clock cycles are required for execution. The typical
execution time for one of these instructions is two or three clock cycles, depending on the specific
instruction  and  the  device  configuration  mode  (“compatible”  or  “turbo”  clocking  mode).  The
“compatible” mode is available only in the SX18/20/28AC and SX18/20/28AC75 devices. For the
exact number of clock cycles required, see the instruction set summary tables or the detailed instruction
descriptions.