SX Users Manual Rev. 3.1
151
© 2000 Scenix Semiconductor, Inc. All rights reserved.
www.scenix.com
Chapter 6
Timers and Interrupts
6.1 Introduction
The SX core has two different timers: the Real-Time Clock/Counter (RTCC) and the Watchdog timer.
The RTCC timer can be used to keep track of elapsed time or to count external events. The Watchdog
timer provides an automatic escape route from infinite loops and other program errors. An RTCC timer
overflow triggers an interrupt, whereas a Watchdog timer overflow triggers a device reset.
Some SX devices such as the SX48/52BD offer additional timers. These non-core features are
described in separate chapters later in this manual.
The SX device supports interrupts from the RTCC circuit and from eight Multi-Input Wakeup pins in
Port B. An interrupt causes a jump to the bottom of the program memory (address 0000h), where the
interrupt service routine is located. The service routine is terminated by an RETI or RETIW
instruction, which causes the device to jump back to the point in the program where the interrupt
occurred and restore the program context at that point.
6.2
Real-Time Clock/Counter
The Real-Time Clock/Counter is a general-purpose timer that can be used to keep track of elapsed time
or to keep a count of pulses received on the RTCC input pin. The RTCC register is a memory-mapped,
8-bit register that can keep a count up to 256. An 8-bit prescaler register can be used to extend the
maximum count to 65,536.
Figure 6-1 is a block diagram showing the RTCC circuit, including the RTCC register, the 8-bit
prescaler register, the Watchdog timer (WDT) register, and the supporting multiplexers and
configuration bits that control the RTCC timer.
The RTCC register is clocked (incremented) either by the internal instruction clock or by pulses
received on the RTCC input pin. The choice is controlled by the RTS bit in the OPTION register. Set
this bit to 1 to count pulses on the RTCC input pin, or clear this bit to 0 to count instruction cycles.
If you select the RTCC input pin as the clock source, the RTE_ES bit in the OPTION register specifies
the type of transition sensed on the pin. Clear the bit to 0 to sense rising edges (low-to-high transitions)
or set the bit to 1 to sense falling edges (high-to-low transitions) on the RTCC pin.