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SX20AC/SX28AC

14.0 REGISTER STATES UPON

DIFFERENT RESET OPERATIONS

The effect of different reset operation on a register

depends on the register and the type of reset operation.

Some registers are initialized to specific values, some

are left unchanged, some are undefined, and some are

initialized to an unknown value.

A register that starts with an unknown value should be

initialized by the software to a known value; you cannot

simply test the initial state and rely on it starting in that

state consistently.
Table 14-1 lists the SX registers and shows the state of

each register upon different reset.

Table 14-1. Register States Upon Different Resets

Register

Power-On

Wakeup

Brown-out

Watchdog

Timeout

MCLR pin

Undefined

Unchanged

Undefined

Unchanged

OPTION

FFh

MODE

0Fh

RTCC (01h)

Undefined

Unchanged

Undefined

Unchanged

PC (02h)

FFh

STATUS (03h)

Bits 0-2: Unde-

fined
Bits 3-4: 11
Bits 5-7: 000

Bits 0-2: Un-

changed.
Bits 3-4: Unch.
Bits 5-7: 000

Bits 0-4: Unde-

fined
Bits 5-7: 000

Bits 0-2: Un-

changed
Bits 3-4: (Note 1)
Bits 5-7: 000

Bits 0-2: Un-

changed
Bits 3-4: (Note 2)
Bits 5-7: 000

FSR (04h)

Undefined

Bits 0-6: Un-

changed
Bit 7: 1

Bits 0-6: Unde-

fined
Bit 7: 1

Bits 0-6: Un-

changed
Bit 7: 1

Bits 0-6: Un-

changed
Bit 7: 1

RA/RB/RC
Direction

FFh

RA/RB/RC Data

(05/06/07h)

Undefined

Unchanged

Undefined

Unchanged

Other File Registers -

SRAM

Undefined

Unchanged

Undefined

Unchanged

CMP_B