© 2000 Scenix Semiconductor, Inc. All rights reserved.
65
SX Users Manual Rev. 3.1
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Chapter 3 Instruction Set
In the syntax description, the parts that are to be used literally are shown in upper case and the variable
parts are shown in lower case. For example, the add W to file register command is shown as follows:
ADD fr,W
The ADD and W should be used exactly as shown in the command syntax, whereas the lower-case
notation fr means that you should use a file register address, which can be any value from $00 to
$1F, or an equivalent symbol. In an actual program, you can use either upper-case or lower-case
characters. Here is an example of an actual add W to register command:
add $0F,W
;add contents of W to file register 0Fh
The text after the semicolon is a comment, which is ignored by the assembler.
Each instruction description includes the following information:
Operation. This section describes the effects of the command in equation form. For example, the
add W to file register command shows the operation as fr = fr + W (fr is set equal to the sum
of fr plus W).
Bits affected. This is a list of the status bits that are affected by execution of the command, such
as the carry (C) and zero (Z) bits.
Opcode. This is the 12-bit opcode of the encoded instruction, shown in binary format. Bits that
depend on variables are shown as letters rather than 0 or 1. For example, the opcode for the ADD
fr,W instruction is shown as 0001 110f ffff. The sequence of five f characters represents the
five-bit file register address specified in the instruction. The letter k or n is similarly used to
represent the constant or number specified in the instruction.
Description. This is a verbal description of what the instruction does.
Cycles. This is the number of clock cycles required to execute the instruction. In cases where this
number depends on certain conditions, those conditions and the resulting numbers are explained.
In some cases, the number depends on the clocking mode (turbo or compatible mode). In the
compatible mode, the number shown is the number of regular instruction cycles required for
execution, each cycle consisting of four device clocks. The compatible mode is only offered in
the SX18/20/28AC and SX18/20/28AC75 devices.
Example. At least one example of the instruction is provided, together with an explanation of
how the example operates.
In some cases, there is an additional section called Config. Option, which explains how the behavior
of the instruction is affected by the device configuration.
Some assemblers support additional instruction mnemonics that are special cases of existing
instructions. Also, some assemblers support macro mnemonics, which are assembled into multiple
instructions. These additional assembler mnemonics are beyond the scope of this section. For more
information, see the documentation provided with the assembler.
Table 3-8 is a quick reference to the abbreviations and symbols used in the instruction descriptions.