© 2000 Scenix Semiconductor, Inc. All rights reserved. 57 SX User’s Manual Rev. 3.1 www.scenix.com Chapter 3 Instruction Set 3.3.3 Bitwise Operation Instructions There are four bitwise operation instructions: • “setb” sets a single bit to 1 in a data register without affecting other bits • “clrb” clears a single bit to 0 in a data register without affecting other bits • “sb” tests a single bit in a data register and skips the next instruction if the bit is set to 1 • “snb” tests a single bit in a data register and skips the next instruction if the bit is cleared to 0 Any bit in any memory-mapped register can be set, cleared, or tested individually, including bits in the
program counter, FSR register, and STATUS register. These instructions are often used to set, clear,
and test bits in the STATUS register. All of the bitwise operation instructions take one clock cycle for execution, except in the case of the
test-and-skip instructions when the tested condition is true and a skip occurs. If a skip instruction is
immediately followed by a PAGE or BANK instruction (and the tested condition is true) then two
instructions  are  skipped  and  the  operation  consumes  three  cycles.  This  is  useful  for  conditional
branching to another page where a PAGE instruction precedes a JMP. If several PAGE and BANK
instructions immediately follow a skip instruction then they are all skipped plus the next instruction
and a cycle is consumed for each. 3.3.4 Data Movement Instructions Each data movement instruction moves a byte of data from one register to another, or performs an
operation on the contents of a source register and simultaneously moves the result into W (without
affecting the source register). The following operations can be performed simultaneously with data
movement into W: add, subtract, complement, increment, decrement, rotate left, rotate right, and swap
high/low nibbles. Instructions are also available that simultaneously increment or decrement the contents of a register,
move the result into W, and test the result. If the 8-bit result is zero, the next instruction in the program
is skipped. Additional data movement instructions are provided to access the port control registers, the MODE
register, and the OPTION register, which are not accessible as ordinary file registers. All of the data movement instructions take one clock cycle for execution, except in the case of the test-
and-skip instructions when the tested condition is true and a skip occurs. 3.3.5 Program Control Instructions Each  program  control  instruction  alters  the  flow  of  the  program  by  changing  the  contents  of  the
program counter. Included in this category are the jump, call, and return-from-subroutine instructions. The “jmp” instruction has a single operand that specifies the new address at which to resume execution.
The new address is typically specified as a label, as in the following example: