SX User’s Manual Rev. 3.1 56 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 3 Instruction Set The immediate value 0Fh is loaded into the W register. The 8-bit immediate value occupies an eight-
bit field in the instruction opcode. 3.3 Instruction Types The instructions are divided into the following categories: • Logic Instructions • Arithmetic and Shift Instructions • Bitwise Operation Instructions • Data Movement Instructions • Program Control Instructions • System Control Instructions The following subsections describe the characteristics of the instructions in these categories. 3.3.1 Logic Instructions Each  logic  instruction  performs  a  standard  logical  operation  (AND,  OR,  exclusive  OR,  or  logical
complement) on the respective bits of the 8-bit operands. The result of the logic operation is written to
W or to a file register. All of these instructions take one clock cycle for execution. 3.3.2 Arithmetic and Shift Instructions Each arithmetic or shift instruction performs an operation such as add, subtract, rotate left or right
through carry, increment, decrement, clear to zero, or swap high/low nibbles. The device can be configured either to use or not use the carry bit as an implicit input to addition and
subtraction operations. This option is controlled by the CF bit in the FUSEX Word (a word that is
programmed at the same time as the program memory). In the default configuration, the carry bit is not
used as an input to these operations. In that case, the carry bit can still be added or subtracted explicitly
by using a separate “test carry bit” instruction in conjunction with an “increment” or “decrement”
instruction. There are instructions are available that increment or decrement a register and simultaneously test the
result. If the 8-bit result is zero, the next instruction in the program is skipped. These instructions can
be used to make program loops. All of the arithmetic and shift instructions take one clock cycle for execution, except in the case of the
test-and-skip instructions when the tested condition is true and a skip occurs.