SX User’s Manual Rev. 3.1 54 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 2 Architecture Table 2-12  FUSEX Word Register Configuration Bits for SX48/52BD Option Bits Description IRCTRIM2:
IRCTRIM0 Internal RC Oscillator Trim. This 3-bit field adjusts the operation of the internal
RC oscillator to make it operate within the target frequency range of typically 4.0
MHz plus or minus 8% (typical). Parts are shipped from the factory untrimmed.
The device relies on the programming tool to provide trimming.
100 = maximum frequency
111 = typical
011 = minimum frequency SLEEPCLK Sleep Clock Disable.
0 = enable crystal/resonator based clock operation during power down mode (to
allow fast start-up).
1 = disable crystal/resonator based clock operation during power down mode (to
reduce power consumption). CF Carry Flag ADD/SUB enable
0 = carry bit input to ADD and SUB instructions
1 = ADD and SUB without carry BOR1: BOR0 Sets the Brown Out Reset threshold voltage
00b = 4.1V
01b = 2.4V
10b = 2.2V
11b = BOR disabled BORTR1:
BORTR0 Brown-Out trim bits (parts are shipped out of factory untrimmed).
00b = minimum threshold voltage
11b = maximum threshold voltage WDRT1:
WDRT0 Delay Reset Timer (DRT) timeout period
10b = 0.25 msec
11b = 18 msec
00b = 60 msec
01b = 1 sec