SX User’s Manual Rev. 3.1 44 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 2 Architecture When a “call” instruction is executed, the CPU does the following: Increments the stack pointer and stores the full program counter contents on the program stack. Loads the lower eight bits of the program counter (the PC register) with the 8-bit value specified
in the instruction opcode.
Clears the ninth bit (bit 8) of the program counter to 0. Copies the PA2:PA0 bits into the high-order bit positions of the stack pointer (bits 11:9). Like the “jmp” instruction, the “call” instruction takes two clock cycles in the “compatible” mode
(SX18/20/28AC and SX18/20/28AC75 devices only) or three clock cycles in the “turbo” clocking
mode.
2.6.5 Return A subroutine called by the “call” instructions is terminated by a “return” instruction. The “return”
instruction restores the full value to the program counter from the stack. This causes the program to
jump back to the instruction immediately following the “call” instruction that called the subroutine.
It is not necessary to set the PA2:PA0 bits in the STATUS register in order to return to the correct place in the program. This is because the full program address is saved on the stack in a “call” instruction
and fully restored by a “return” instruction. Therefore, the program always returns to the instruction
immediately following the “call” instruction, even for a subroutine call across page boundaries. The
PA2:PA0 bits are ignored by “return” instructions.
There  are several  different “return” type  instructions available in the  instruction  set. Some are  for returning  from  subroutines  and  other  are  for  returning  from  interrupts.  All  of  them  are  listed  and described in Table 2-8. For more information on interrupts, see Chapter 6.