© 2000 Scenix Semiconductor, Inc. All rights reserved. 29 SX User’s Manual Rev. 3.1 www.scenix.com Chapter 2 Architecture To change from an upper block to a lower block bank, bit 7 of FSR must be cleared.
With indirect addressing, you specify the full 8-bit address of the register using FSR as a pointer. This
addressing mode provides the flexibility to access different registers or multiple registers using the
same instruction in the program.
You invoke indirect addressing by using fr=00h. For example: mov W,#$F5   ;load W with F5h
mov $04,W                          ;move value F5h into FSR
mov W,#$01   ;load W with 01h
mov $00,W ;move value 01h into register F5h In the second “mov” instruction, FSR is loaded with the desired 8-bit register address. In the fourth
“mov” instruction, fr = 00, so the device looks at FSR and moves the result to the register addressed
by FSR, which is the register at F5h (Bank F, register number 5).
A practical example that uses indirect addressing is the following program, which clears the upper
eight registers in the global register bank and the upper 8 registers in all banks from Bank 1 through
Bank F: clr FSR                            clear FSR to 00h (at address 04h)
:loop setb FSR.3 ;set FSR bit 3 clr $00 ;clear register pointed to by FSR incsz FSR ;increment FSR and test
;skip jmp if 00h jmp:loop ;jump back and clear next reg. This program initially clears FSR to 00h. At the beginning of the loop, it sets bit 3 of FSR so that it
starts at 08h. The “clr $00” instruction clears the register pointed to by FSR (initially, the file register
at 08h in the global register bank). Then the program increments FSR and clears consecutive file reg-
isters, always in the upper half of each bank: (08h, 09h, 0Ah... 0Fh, 18h, 19h... FFh). The loop ends
when FSR wraps back to 00h.
For addresses from 01h through 0Fh, the global register bank is accessed. For higher addresses, Bank
1 through Bank F are accessed. This program does not affect Bank 0, which is not accessible in the
indirect addressing mode. Bank 0 can be accessed only using the semi-direct mode. 2.4 Special-Function Registers The SX instructions can access a set of dedicated file registers at the bottom of the data memory and
the general-purpose file registers at higher addresses. Many instructions can also access certain non-
memory-mapped registers: the Working register (W), the port control registers, the MODE register,
and the OPTION register. All of these registers are eight bits wide. Table 2-2 lists and briefly describes the dedicated file registers and non-memory-mapped registers that are accessible to SX instructions.