© 2000 Scenix Semiconductor, Inc. All rights reserved. 167 SX User’s Manual Rev. 3.1 www.scenix.com Chapter 8 Multi-Function Timers 8.2.3 External Event Mode The External Event mode is the same as the PWM mode, except that the counter register is clocked by
an external signal provided on an input pin rather than by the system clock. This mode can be used to
count the occurrences of external events. The input pin can be configured to sense either rising or
falling edges. 8.2.4 Capture/Compare Mode In the Capture/Compare mode, the counter counts upward continuously without interruption. A valid
transition received on either of two input pins causes the current value of the counter to be captured in
an  associated  capture  register.  This  capture  feature  can  be  used  to  keep  track  of  the  elapsed  time
between successive external events. In addition, the timer continuously compares the counter value
against the value programmed into the R1 register. Each time a match occurs, it toggles the timer
output pin, generates an interrupt (if enabled) and sets an associated interrupt pending flag. The timer
continues to count upward after a match occurs (unlike the PWM mode, which resets the counter to
zero when a match occurs). In the Capture/Compare mode, the timer is clocked by the on-chip system clock divided by a value
defined by a 3-bit divide-by factor. The divide-by factor can be set to any power-of-2 from 1 to 128. The two input capture pins are designated Capture 1 and Capture 2. They can be configured to sense
either rising or falling edges. The Capture 1 pin captures the counter value in a dedicated 16-bit capture
register, a read-only register. The Capture 2 pin captures the counter value in the R2 register. The
occurrence of a capture event also generates an interrupt (if enabled) and sets an associated interrupt
pending flag. Overflow of the counter from FFFFh to 0000h also generates an interrupt (if enabled) and sets an
associated interrupt pending flag. Because the counter is free-running, an overflow can occur at any
time. In cases where the time between successive capture events might exceed 65,536 counts of the
timer, the software should keep track of the number of overflows between successive events in order
to determine the true amount of time between such events.