SX User’s Manual Rev. 3.1 148 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 5 Input/Output Ports PLP_A through PLP_E: Pullup Enable Registers (MODE=1Eh) Each register bit determines whether an internal pullup resistor is connected to the pin. Set the bit to 1
to disconnect the pullup resistor or clear the bit to 0 to connect the pullup resistor. The bit is set to 1
after all resets. If SYNC is enabled in the FUSE register, port data must be read more than 2 cycles
after a change to the input level mode or Schmitt trigger mode. LVL_A through LVL_E: Input Level Registers (MODE=1Dh) Each register bit determines the voltage levels sensed on the input port, either TTL or CMOS, when
the Schmitt trigger option is disabled. Program each bit according to the type of device that is driving
the port input pin. Set the bit to 1 for TTL or clear the bit to 0 for CMOS. The bit is set to 1 after all
resets. If SYNC is enabled in the FUSE register, port data must be read more than 2 cycles after a
change to the input level mode or Schmitt trigger mode. ST_B through ST_E: Schmitt Trigger Enable Registers (MODE=1Ch) Each register bit determines whether the port input pin operates with a Schmitt trigger. Set the bit to 1
to disable Schmitt trigger operation and sense either TTL or CMOS voltage levels; or clear the bit to
0 to enable Schmitt trigger operation. The bit is set to 1 after all resets. WKEN_B: Wakeup Enable Register (MODE=1Bh) Each  register  bit  enables  or  disables  the  Multi-Input  Wakeup/Interrupt  (MIWU)  function  for  the
corresponding Port B input pin. Clear the bit to 0 to enable MIWU operation or set the bit to 1 to disable
MIWU operation. The bit is set to 1 after all resets. For more information on using the Multi-Input
Wakeup/Interrupt function, see Section 4.4. WKED_B: Wakeup Edge Register (MODE=1Ah) Each register bit selects the edge sensitivity of the corresponding Port B input pin for MIWU operation.
Clear the bit to 0 to sense rising (low-to-high) edges. Set the bit to 1 to sense falling (high-to-low)
edges. The bit is set to 1 after all resets. WKPND_B: Wakeup Pending Flag Register (MODE=19h) When  you  access  the  WKPND_B  register  using  the  “mov  !RB,W”  instruction,  the  CPU  does  an
exchange  between  the  contents  of  W  and  WKPND_B.  This  feature  lets  you  read  the  WKPND_B
register contents. Each bit indicates the status of the corresponding MIWU pin. A bit set to 1 indicates
that a valid edge has occurred on the corresponding MIWU pin, triggering a wakeup or interrupt. A bit
set to 0 indicates that no valid edge has occurred on the MIWU pin. The WKPND_B register comes
up with undefine value upon reset.