© 2000 Scenix Semiconductor, Inc. All rights reserved. 9 SX User’s Manual Rev. 3.1 www.scenix.com Contents List of Tables Table 1-1 Device Package Names ...............................................................................................17 Table 1-2 Pin Descriptions ..........................................................................................................20 Table 2-1 SX18/20/28AC and SX18/20/28AC75 RAM Register Map  ......................................24 Table 2-2 Register Summary .......................................................................................................30 Table 2-3 STATUS Register Bits ................................................................................................32 Table 2-4 MODE Register Settings for SX18/20/28AC and SX18/20/28AC75  ........................35 Table 2-5 MODE Register Settings for SX48/52BD  ..................................................................36 Table 2-6 Prescaler Divide-By Factors  .......................................................................................38 Table 2-7 Pipeline Execution Sequence ......................................................................................39 Table 2-8 Return-from-Subroutine/Interrupt Instructions ...........................................................45 Table 2-9 FUSE Word Register Configuration Bits for SX18/20/28AC ....................................49 Table 2-10 FUSEX Word Register Configuration Bits for SX18/20/28AC &
SX18/20/28AC75 ........................................................................................................51 Table 2-11 FUSE Word Configuration Bits for SX48/52BD  .......................................................52 Table 2-12 FUSEX Word Register Configuration Bits for SX48/52BD  ......................................54 Table 3-1 Logic Instructions  .......................................................................................................60 Table 3-2 Arithmetic and Shift Instructions ................................................................................60 Table 3-3 Bitwise Operation Instructions  ...................................................................................61 Table 3-4 Data Movement Instructions .......................................................................................61 Table 3-5 Program Control Instructions ......................................................................................63 Table 3-6 System Control Instructions ........................................................................................63 Table 3-7 Equivalent Assembler Mnemonics  .............................................................................64 Table 3-8 Key to Abbreviations and Symbols  ............................................................................66 Table 4-1 Register States Upon Different Resets ......................................................................139 Table 5-1 MODE Register Settings for SX18/20/28AC and SX18/20/28AC75  ......................146 Table 5-2 MODE Register Settings for SX48/52BD  ................................................................146 Table 6-1 Watchdog Timeout Settings ......................................................................................155 Table 8-1 Timer T1/T2 Pin Assignments ..................................................................................168 Table 8-2 T1CNTA Register Bits  .............................................................................................169 Table 8-3 T1CNTB Register Bits ..............................................................................................170 Table 8-4 T2CNTA Register Bits  .............................................................................................171 Table 8-5 T2CNTB Register Bits ..............................................................................................172