© 2000 Scenix Semiconductor, Inc. All rights reserved. 3 SX Device Programming Specifications Rev 2.2 www.scenix.com Additional information such as vendor numbers and serial numbers can be programmed into the device
just  prior  to  shipment.  There  is  no  risk  of  stocking  out-dated,  pre-programmed  units  because  the
software can be corrected or updated at any time. Even after the product is received by the customer, it can be quickly and easily revised or patched by field  service  personnel.  Customers  can  even  reprogram  their  products  themselves  if  they  have  the necessary programming equipment. This equipment is relatively inexpensive and easy to use. 2.1 In-System Programming Implementation The Scenix ISP method is a proprietary system that uses just two device pins for programming I/O: the
clock input pin (OSC1) and the clock output pin (OSC2). The VDD, GND, and MCLR pins also need
to be connected properly (MCLR needs to be pulled up). This system eliminates the need for dedicated
programming pins, thus reducing the total device pin count. There is no need for a JTAG tester, an
expensive device required by some other programming systems. OSC1 is used to supply the higher voltage necessary for programming the flash memory , while OSC2
is used to issue commands, to write data to the EEPROM, and to read data back from the EEPROM.
The  external  programming  device  writes  a  data  stream  to  OSC2  to  specify  the  ISP  programming
operations and to supply the data written into the program memory. When the specified operation is a
request to read a program memory location, the SX returns the results as a data stream on the same pin,
OSC2. The OSC1 and OSC2 pins are usually connected to passive components such as resistors, capacitors,
and crystals. In typical systems, these components do not interfere with the programming signals and
are not harmed by the higher voltages used for programming. In these cases, they can be left connected
to the SX device during programming. It is usually not necessary to install additional hardware to
isolate the ISP circuit from the rest of the system. There are three stages to the ISP protocol: • Entering the ISP Mode • Programming in ISP Mode • Exiting the ISP Mode 2.2 Entering the ISP Mode For normal operation of the SX device, the OSC2 pin is either left unconnected, connected to passive
components, or used as a clock output pin, depending on the chosen clock configuration. To put the
device into the ISP mode, you pull the OSC2 pin low for at least nine consecutive clock cycles on the
OSC1 pin (or nine internal clock cycles in the internal clocking mode). This action is a signal to the
SX to go into the programming mode. If the clock option is not known, pull OSC2 low for 0.31 ms.
This time is calculated based on the minimum clock speed (32KHz). The exact procedure for entering the ISP mode depends on whether you are using external or internal components  for  normal  clocking  of  the  device.  If  you  are  using  an  external  crystal  or  resonator