© 2000 Scenix Semiconductor, Inc. All rights reserved.
- 52 -
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SX48BD/SX52BD/SX52BD75/SX52BD100
Note 1: In- system programming is guaranteed for Vdd of 2.7V to 5.5V.
Note 2: Vdd must start rising from Vss to ensure proper Power-On-Reset when relying on the internal Power-On-Reset
Circuitry.
Note 3: No floating inputs. On the 48pin device ports RA4-RA7 are programmed as outputs.
Note 4: The FUSE register contains 0AAh.
17.3
AC Characteristics
SX48BD/SX52BD/SX48BD-I/SX52BD-I: Operating Temperature 0°C <= Ta <= +70°C (Commercial) and
-40°C <= Ta <= +85°C (Industrial)
Note:Data in the Typical (“TYP”) column is at 5V, 25°C unless otherwise stated.
Symbol
Parameter
Min
Typ
Max
Units
Conditions
Fosc
External CLKIN Frequency
DC
-
4.0
1.0
8.0
50.0
32.0
1.0
MHz
MHz
MHz
MHz
KHz
MHz
RC
XT1
XT2
HS2/HS3
LP1
LP2
Oscillator Frequency
(Crystal/Resonator)
DC
0.032
1.0
1.0
DC
0.032
-
4.0
1.0
8.0
50.0
32.0
1.0
MHz
MHz
MHz
MHz
KHz
MHz
RC
XT1
XT2
HS2/HS3
LP1
LP2
Tosc
External CLKIN Period
250.0
1.0
125.0
20.0
31.25
1.0
-
-
ns
µs
ns
ns
µs
µs
RC
XT1
XT2
HS2/HS3
LP1
LP2
Oscillator Period
(Crystal/Resonator)
250.0
1.0
125.0
20.0
31.25
1.0
-
-
31.25
1000
1000
-
31.25
ns
µs
ns
ns
µs
µs
RC
XT1
XT2
HS2/HS3
LP1
LP2
TosL, TosH
Clock in (OSC1) Low or High Time
50.0
8.0
400
-
-
ns
ns
ns
XT1/XT2
HS2/HS3
LP1/LP2
TosR, TosF Clock in (OSC1) Rise or Fall Time
-
-
25.0
25.0
50.0
ns
ns
µs
XT1/XT2
HS2/HS3
LP1/LP2
