© 2000 Scenix Semiconductor, Inc. All rights reserved. - 3 - www.scenix.com SX48BD/SX52BD/SX52BD75/SX52BD100 1.2 Key Features 100 MIPS Performance •    DC - 100 MHz operation •    10 ns instruction cycle, 30 ns internal interrupt re- sponse at 100 MHz •    1 instruction per clock (branches 3) EE/FLASH Program Memory ad SRAM Data Memory •    Access time of < 10 ns provides single cycle access •    EE/Flash rated for > 10,000 rewrite cycles •    4096 Words of EE/Flash program memory •    262x8 bits SRAM data memory CPU Features •    Compact instruction set •    All instructions are single cycle except branch •    Eight-level push/pop hardware stack for subroutine linkage •    Fast table lookup capability through run-time readable code (IREAD instruction) •    Predictable program execution flow for hard real-time applications Fast and Deterministic Interrupt •    Jitter-free 3-cycle internal interrupt response •    Hardware context save/restore of key resources such as PC, W, STATUS, and FSR within the 3-cycle inter- rupt response time •    External wakeup/interrupt capability on Port B (8 pins) Flexible I/O •    All pins individually programmable as I/O •    Inputs are TTL or CMOS level selectable •    All pins have selectable internal pull-ups •    Selectable Schmitt Trigger inputs on Ports B, C, D, and E •    All outputs capable of sourcing/sinking 30 mA •    Port A outputs have symmetrical drive •    Analog comparator support on Port B (RB0 OUT, RB1 IN-, RB2 IN+) •    Selectable I/O operation synchronous to the oscillator clock Hardware Peripheral Features •    Two 16-bit timers with 8-bit prescalers supporting: –   Software Timer mode –   PWM mode –   Simultaneous PWM/Capture mode –   External Event mode •    One 8-bit Real Time Clock/Counter (RTCC) with pro- gramable 8-bit prescaler •    Watchdog Timer (shares the RTCC prescaler) •    Analog comparator •    Brown-out detector •    Multi-Input Wakeup logic on 8 pins •    Internal RC oscillator with configurable rate from 31.25 kHz to 4 MHz •    Power-On-Reset Packages •    48-pin Tiny PQFP, and 52-pin PQFP Programming and Debugging Support •    On- chip in-system programming support with serial or parallel interface •    In-system serial programming via oscillator pins •    On-chip in-System debugging support logic •    Real-time emulation, full program debug, and integrat- ed development environment offered by third party tool vendors Software Support •    Library of off-the-shelf Virtual Peripheral modules •    Examples of Virtual Peripheral integration •    Evaluation Kits for communication intensive applica- tions