© 2000 Scenix Semiconductor, Inc. All rights reserved. - 20 - www.scenix.com SX48BD/SX52BD/SX52BD75/SX52BD100 5.2.2  Register Access Examples Here  is  an  example  of  an  instruction  that  uses  direct addressing: inc $0F ;increment file register 0Fh This  instruction  increments  the  contents  of  file  register 0Fh in the global register bank. It does not matter what is contained in the FSR register. To gain access to any register outside of the global regis- ter  bank,  it  is  necessary  to  use  semi-direct  or  indirect addressing. In that case, you need to make sure that the FSR register contains the correct value for accessing the desired bank. Here are 2 examples that use semi-direct addressing: mov W,#$F0   ;load W with F0h mov FSR,W ;load W into FSR (Bank F) inc $1F ;increment file register FFh Or, to access bank 0, mov W,#$00   ;load W with 00h mov FSR,W ;load W into FSR (Bank 0) inc $1F ;increment file register 0Fh In these examples,  “FSR”  is  a  label  that  represents  the value 04h, which is the address of the FSR register in the global register bank. Note that the FSR register is itself a memory-mapped global register, which is always acces- sible using direct addressing. The  “banked”  data  memory  is  divided  into  upper  and lower blocks, each consisting of 8 banks of data memory. The range for the lower block is from $00 to $7F, while the rage for the upper block is from $80 to $FF. Bit 7 of the FSR is used to select the upper or lower block. The BANK  instruction  is  used  to  select  the  bank  within  that block. To use the “bank” instruction, in the syntax of the assem- bly language, you specify an 8-bit value that corresponds to the desired bank number. The assembler encodes bits 4,  5,  and  6   of  the  specified  value  into  the  instruction opcode  and  ignores  bit  7  and  the  low-order  bits.  For example, if another lower bank was being used to incre- ment   file   register   2Fh,   you   could   use   the   following instructions: bank $20 ;select Bank 2 in FSR inc $1F ;increment register 2F Note  that  the  “bank”  instruction  only  modifies  bits  4,  5, and  6  the  FSR  register.  Therefore,  to  change  from  a lower block to an upper block bank, the “bank” instruction will not work. Instead, you need to write the whole FSR register using code such as the following: mov W,#$80   ;load W with 80h mov FSR,W ;select Bank 8 in FSR Another approach is to set bit 7 of the FSR register indi- vidually after the “bank” instruction to address an upper block bank. bank $80 ;set bits in 4, 5, and 6 FSR setb FSR.7 ;select Bank 8 in FSR To change from an upper block to a lower block bank, bit 7 of FSR must be cleared. With   indirect   addressing,   you   specify   the   full   8-bit address  of  the  register  using  FSR  as  a  pointer.  This addressing mode provides the flexibility to access differ- ent registers or multiple registers using the same instruc- tion in the program. You   invoke   indirect   addressing   by   using   fr=00h.   For example: mov W,#$F5   ;load W with F5h mov $04,W ;move value F5h into FSR mov W,#$01   ;load W with 01h mov $00,W ;move value 01h into register F5h In the second “mov” instruction, FSR is loaded with the desired 8-bit register address. In the fourth “mov” instruc- tion, fr = 00, so the device looks at FSR and moves the result to the register addressed by FSR, which is the reg- ister at F5h (Bank F, register number 5). A practical example that uses indirect addressing is the following program, which clears the upper eight registers in the global register bank and the upper 8 registers in all banks from Bank 1 through Bank F: clr FSR ;clear FSR to 00h (at address 04h) :loop setb FSR.3 ;set FSR bit 3 clr $00 ;clear register pointed to by FSR incsz FSR ;increment FSR and test ;skip jmp if 00h jmp:loop ;jump back and clear next reg. This program initially clears FSR to 00h. At the beginning of the loop, it sets bit 3 of FSR so that it starts at 08h. The “clr $00” instruction clears the register pointed to by FSR (initially,  the  file  register  at  08h  in  the  global  register bank).  Then  the  program  increments  FSR  and  clears consecutive  file  registers,  always  in  the  upper  half  of each bank: (08h, 09h, 0Ah... 0Fh, 18h, 19h... FFh). The loop ends when FSR wraps back to 00h. For addresses from 01h through 0Fh, the global register bank is accessed. For higher addresses, Bank 1 through Bank F are accessed. This program does not affect Bank 0,   which   is   not   accessible   in   the   indirect   addressing mode.  Bank  0  can  be  accessed  only  using  the  semi- direct mode.