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SX48BD/SX52BD/SX52BD75/SX52BD100
3.2
Read-Modify-Write Considerations
When two successive instructions are used on the same
I/O port (except mov Rx,W ) with a very high clock rate,
the write part of one instruction might not occur soon
enough before the read part of the very next instruction,
resulting in getting old data for the second instruction.
To ensure predictable results, avoid using two succes-
sive read-modify-write instructions that access the same
port data register if the clock rate is high or, insert 3 NOP
instructions between the successive read-modify-write
instructions (if SYNC bit in the FUSE register is enabled,
5 NOP instructions are required). For operating frequen-
cies of 50 MHz or lower, if bit 7 of the T2CNTB (POR-
TRD) is set, the port reads data from the data register
instead of port pins. In this case, the NOP instructions
are not required.
3.3
Port Configuration
Each port pin offers the following configuration options:
data direction
input voltage levels (TTL or CMOS)
pullup type (enable or disable)
Schmitt trigger input (except for Port A)
Port B offers the additional option to use the port pins for
the Multi-Input Wakeup/Interrupt function, the analog
comparator function, or Timer T1 I/O. Port C offers the
additional option to use the port pins for Timer T2 I/O.
Port configuration is performed by writing to a set of con-
trol registers associated with the port. A special-purpose
instruction is used to write these control registers:
mov !RA,W (move W to/from Port A control register)
mov !RB,W (move W to/from Port B control register)
mov !RC,W (move W to/from Port C control register)
mov !RD,W (move W to/from Port D control register)
mov !RE,W (move W to/from Port E control register)
Each one of these instructions reads or writes a port con-
trol register for Port A, B, C, D, or E. There are multiple
control registers for each port. To specify which one you
want to access, you use another register called the
MODE register.
3.3.1 MODE Register
The MODE register controls access to the port configura-
tion registers and Timer T1/T2 control registers. Because
the MODE register is not memory-mapped, it is accessed
by the following special-purpose instructions:
mov M, #lit (move literal to lower 4-bits of MODE regis-
ter)
mov M,W (move W to lower 5-bits of MODE register)
mov W,M (move MODE register to W)
The value contained in the MODE register determines
which port control register is accessed by the mov !rx,W
instruction as indicated in Table3-3. (The table also
shows the timer control registers accessed according to
the MODE register setting.) MODE register values not
defined in the table are reserved for future expansion and
should not be used. Upon power-up, the MODE register
is initialized to 1Fh, which enables write access to the
port direction control registers.
When bit 4 of the MODE register is 0 (the top half of
Table3-3), a mov !rx,W instruction moves the contents
of the applicable control register into W. When bit 4 of the
MODE register is 1 (the bottom half of Table3-3), a mov
!rx,W instruction moves the contents of W into the appli-
cable control register. However, there are some excep-
tions to this. For the CMP_B and WKPND_B registers,
the CPU does an exchange of data between W and the
control register, regardless of the state of bit 4 in the
MODE register. For the WKED_B and WKEN_B regis-
ters, the CPU moves the data from W to the control regis-
ter, regardless of the state of bit 4 in the MODE register.
After a value is written to the MODE register, that setting
remains in effect until it is changed by writing to the
MODE register again. For example, you can write the
value 1Eh to the MODE register just once, and then write
to each of the five pullup configuration registers using the
five mov !rx,W instructions.