© 2000 Scenix Semiconductor, Inc. All rights reserved. - 4 - www.scenix.com SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75 1.3    Architecture The  SX  devices  use  a  modified  Harvard  architecture.
This architecture uses two separate memories with sepa-
rate  address  buses,  one  for  the  program  and  one  for
data, while allowing transfer of data from program mem-
ory  to  SRAM.  This  ability  allows  accessing  data  tables
from  program  memory.  The  advantage  of  this  architec-
ture is that instruction fetch and memory transfers can be
overlapped with a multi-stage pipeline, which means the
next  instruction  can  be  fetched  from  program  memory
while the current instruction is being executed using data
from the data memory.
Scenix has developed a revolutionary RISC-based archi-
tecture and memory design  techniques  that  is  20  times
faster  than conventional  MCUs, deterministic, jitter free,
and totally reprogramable.
The  SX  family  implements  a  four-stage  pipeline  (fetch,
decode, execute, and write back), which results in execu-
tion  of  one  instruction  per  clock  cycle.  For  example,  at
the  maximum  operating  frequency  of  50  MHz,  instruc-
tions  are  executed  at  the  rate  of  one  per  20-ns  clock
cycle.
1.3.1  The Virtual Peripheral Concept
Virtual Peripheral concept enables the “software system
on a chip” approach. Virtual Peripheral, a software mod-
ule that replaces a traditional hardware peripheral, takes
advantage of the Scenix architecture’s high performance
and deterministic nature to produce same results as the
hardware peripheral with much greater flexibility.
The speed and flexibility of the Scenix architecture com-
plemented  with  the  availability  of  the  Virtual  Peripheral
library, simultaneously address a wide range of engineer-
ing  and  product  development  concerns.  They  decrease
the  product  development  cycle  dramatically,  shortening
time to production to as little as a few days.
Scenix’s  time-saving  Virtual  Peripheral  library  gives  the
system designers a choice of ready-made solutions, or a
head start on developing their own peripherals. So, with
Virtual   Peripheral   modules   handling   established   func-
tions, design engineers can concentrate on adding value
to other areas of the application.
The concept of Virtual  Peripheral  combined with  in-sys-
tem  re-programmability  provides  a  power  development
platform  ideal  for  the  communications  industry  because
of the numerous and rapidly evolving standards and pro-
tocols.
Overall, the concept of Virtual Peripheral provides bene-
fits such as using a more simple device, reduced compo-
nent  count,  fast  time  to  market,  increased  flexibility  in
design, customization to your application, and ultimately
overall system cost reduction.       
Some examples of Virtual Peripheral modules are: •    Communication interfaces such as I²C™, Microwire™       (µ-Wire), SPI, IrDA Stack, UART, and Modem func-
      tions
•    Frequency generation and measurement
•    PPM/PWM output •    Delta/Sigma ADC
•    DTMF generation/detection
•    PSK/FSK generation/detection
•    FFT/DFT based algorithms
1.3.2  The Communications Controller
The combination of the Scenix hardware architecture and
the Virtual Peripheral concept create a powerful, creative
platform for the communications design communities: SX
communications   controller.  Its   high  processing   power,
recofigurability,   cost-effectiveness,   and   overall   design
freedom give the designer the power to build products for
the  future  with  the  confidence  of knowing  that  they can
keep up with innovation in standards and other areas. 1.4    Programming and Debugging Support The  SX  devices  are  currently  supported  by  third  party
tool vendors. On-chip in-system debug capabilities have
been   added,   allowing   tools   to   provide   an   integrated
development environment including editor, macro assem-
bler, debugger, and programmer. Un-obtrusive in-system
programming is provided through the OSC pins. There is
no need for a bon-out chip, so the user does not have to
worry  about the potential variations in  electrical charac-
teristics of a bond-out chip and the actual chip used in the
target applications. the user can test and revise the fully
debugged code in the actual SX, in the actual application,
and get to production much faster. 1.5    Applications Emerging  applications  and  advances  in  existing  ones
require  higher  performance  while  maintaining  low  cost
and fast time-to-production.
The device provides solutions for many familiar applica-
tions   such   as   process   controllers,   electronic   appli-
ances/tools,    security/monitoring    systems,     consumer
automotive,  sound  generation,  motor  control,  and  per-
sonal  communication devices.  In addition,  the  device is
suitable  for  applications  that  require  DSP-like  capabili-
ties, such as closed-loop servo control (digital filters), dig-
ital answering machines, voice notation, interactive toys,
and magnetic-stripe readers.
Furthermore,  the  growing  Virtual  Peripheral  library  fea-
tures  new  components,  such  as  the  Internet  Protocol
stack,  and  communication  interfaces,  that  allow  design
engineers to embed Internet connectivity into all of their
products at extremely low cost and very little effort.