IP2022 Data Sheet
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97
7.1.19 STATUS Register
Condition flags for the results of arithmetic and logical
operations, the page bits, and bits which indicate the
skipping state of the core and control of continuation skip
after return from interrupt.
7
5
4
3
2
1
0
PA2:0
SAR SSF
Z
DC
C
Name
Description
PA2:0
Program memory page select bits. Used
to extend the 13-bit address encoded in
jump and call instructions (these 3 bits are
written to the upper 3 bits of the program
counter when a jump or call occurs). Mod-
ified using the page instruction.
SAR
Skip After Return bit. Indicates if the core
should be in the skipping/not state after
the completion of a return instruction
(ret, retnp, or retw instructions, but
not reti). The return instruction will also
clear the SAR bit to ensure correct behav-
ior after the dynamic jump.
0 = The core should not be in a
skipping state upon completion
of the return.
1 = The core should be in a skip-
ping state upon completion of
the return.
SSF
Shadowed Skipping/not state Flag. Gives
the ISR the ability to know if the interrupt
occured immediately following a skip
instruction. The software can choose
either to clear the SSF flag in the ISR or to
make the first instruction of the mainline
context switching code a nop to flush out
the skip state.
0 = The core was not in a skipping
state when interrupted.
1 = The core was in a skipping
state when interrupted.
Z
Zero bit. Affected by most logical, arith-
metic, and data movement instructions.
Set if the result was zero, otherwise
cleared.
0 = Result of last ALU operation
was non-zero.
1 = Result of last ALU operation
was zero.
DC
Digit Carry bit. After addition, set if carry
from bit 3 occurred, otherwise cleared.
After subtraction, cleared if borrow from
bit 3 occurred, otherwise set.
0 = Last addition did not generate
carry out of bit 3, or last sub-
traction generated borrow out
of bit 3.
1 = Last addition generated carry
out of bit 3, or last subtraction
did not generate borrow out of
bit 3.
C
Carry bit. After addition, set if carry from
bit 7 of the result occurred, otherwise
cleared. After subtraction, cleared if bor-
row from bit 7 of the result occurred, oth-
erwise set. After rotate (rr or rl)
instructions, loaded with the LSB or MSB
of the operand, respectively.
0 = Last addition did not generate
carry out of bit 7, last subtrac-
tion generated borrow out of bit
7, or last rotate loaded a 0.
1 = Last addition generated carry
out of bit 7, last subtraction did
not generate borrow out of bit
7, or last rotate loaded a 1.
Name
Description