90 www.ubicom.com IP2022 Data Sheet 7.1.9 RTCFG Register Real-Time Timer configuration. 7 6 3 2 1 0 RTEN RTPS3:0 RTSS   RTIE    RTIF Name Description RTEN Real-Time Timer enable bit 0 =   Real-Time Timer disabled
1 =   Real-Time Timer enabled RTPS3:0 Real-Time Timer prescaler divisor 0000 =   1
0001 =   2
0010 =   4
0011 =   8
0100 =   16
0101 =   32
0110 =   64  0111 =   128
1000 =   256
1001 =   512
1010 =   1024
1011 =   2048
1100 =   4096
1101 =   8192 1110 =   16384
1111 =   32768 RTSS Real-Time Timer clock source select 0 =   pre-PLL clock
1 =   external RTCLK RTIE Real-Time Timer interrupt enable bit 0 =   Real-Time Timer interrupt dis-          abled
1 =   Real-Time Timer interrupt enabled RTIF Real-Time Timer interrupt flag 0 =   No timer overflow has occurred          since this bit was last cleared
1 =   Timer overflow has occurred. This bit goes high two cycles
after the actual overflow
occurs. Name Description