IP2022 Data Sheet www.ubicom.com 83 0x05B T2CMP1L Timer 2 Compare 1 register low 0000 0000 0x05C T2CFG1H Timer 2 configuration register 1 high 0000 0000 0x05D T2CFG1L Timer 2 configuration register 1 low 0000 0000 0x05E T2CFG2H Timer 2 configuration register 2 high 0000 0000 0x05F T2CFG2L Timer 2 configuration register 2 low 0000 0000 0x060 S1TMRH SERDES 1 clock timer register (high bits) 0000 0000 0x061 S1TMRL SERDES 1 clock timer register (low bits) 0000 0000 0x062 S1TBUFH SERDES 1 transmit buffer (high bits) Undefined 0x063 S1TBUFL SERDES 1 transmit buffer (low bits) Undefined 0x064 S1TCFG SERDES 1 transmit configuration 0000 0000 0x065 S1RCNT SERDES 1 received bit count (actual) (read-only) 0000 0000 0x066 S1RBUFH SERDES 1 receive buffer (high bits) Undefined 0x067 S1RBUFL SERDES 1 receive buffer (low bits) Undefined 0x068 S1RCFG SERDES 1 receive configuration 0000 0000 0x069 S1RSYNC SERDES 1 receive bit sync pattern 0000 0000 0x06A S1INTF SERDES 1 status/Interrupt flags 0000 0000 0x06B S1INTE SERDES 1 Interrupt enable bits 0000 0000 0x06C S1MODE SERDES 1 serial mode/clock select register 0000 0000 0x06D S1SMASK SERDES 1 receive sync mask 0000 0000 0x06E PSPCFG Parallel slave peripheral config register 0000 00xx (See Section 7.1.8 for BO, WD) 0x06F CMPCFG Comparator configuration register 0000 000X 0x070 S2TMRH SERDES 2 clock timer register (high bits) 0000 0000 0x071 S2TMRL SERDES 2 clock timer register (low bits) 0000 0000 0x072 S2TBUFH SERDES 2 transmit buffer (high bits) Undefined 0x073 S2TBUFL SERDES 2 transmit buffer (low bits) Undefined 0x074 S2TCFG SERDES 2 transmit configuration 0000 0000 0x075 S2RCNT SERDES 2 received bit count (actual) (read-only) 0000 0000 0x076 S2RBUFH SERDES 2 receive buffer (high bits) Undefined 0x077 S2RBUFL SERDES 2 receive buffer (low bits) Undefined 0x078 S2RCFG SERDES 2 receive configuration 0000 0000 0x079 S2RSYNC SERDES 2 receive bit sync pattern 0000 0000 0x07A S2INTF SERDES 2 status/Interrupt flags 0000 0000 Table 7-1  Register Addresses and Reset State (continued) Address Name Description Register Status Follow- ing Reset (Power-On,
RST, Brown-Out RST, Watchdog RST)