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IP2022 Data Sheet
2.3
Signal Descriptions
I = Digital Input, AI = Analog Input, O/DO = Digital Output, HiZ = High Impedance, P = Power, PLP = On-Chip Pullup,
ST = Schmitt Trigger
Table 2-1 Signal Descriptions
Name
Pin
Type
Sink
@ 3.3V
IOVDD
Source
@ 3.3V
IOVDD
Function
PQFP
µBGA
AVDD
70
B6
P
Analog Supply
AVSS
71
A6
P
Analog Ground
DVDD
9, 31,
56, 72
D1,D6,
E9,G5
P
Logic Supply
DVSS
10, 32,
55, 73
E1,K5,
E10,D5
P
Logic Ground
GVDD
65
A8
P
I/O Port G supply
IOVDD
12, 34,
53
E5,G6,
E6
P
I/O Supply (except Port G)
IOVSS
11, 33,
54
E2,K6,
E7
P
I/O Ground (all ports)
XVDD
76
A4
P
PLL Supply
XVSS
77
D4
P
PLL Ground
OSC1
78
B4
I
Clock/Crystal/Resonator Input
OSC2
79
A3
O
Crystal/Resonator Output (tri-state if ext. clock)
RST
80
A2
I/ST/
PLP
Reset Input
RTCLK1
74
A5
I
Real-Time Clock/Crystal Input
RTCLK2
75
B5
O
Real-Time Crystal Output
TSS
1
A1
I/ST/
PLP
Target SPI Slave Select (used only for in-system pro-
gramming and debug)
TSCK
2
C2
I/ST/
PLP
Target SPI Clock (used only for in-system program-
ming and debug)
TSI
3
B1
I/ST
/PLP
Target SPI Serial Data Input (used only for in-system
programming and debug)
TSO
4
B2
O/HiZ
Target SPI Serial Data output (used only for in-sys-
tem programming and debug)
RA0
5
D2
I/O
24 mA
24 mA
I/O Port, High Power Output, Timer 1 Capture 1 Input
RA1
6
C1
I/O
24 mA
24 mA
I/O Port, High Power Output, Timer 1 Capture 2 Input
RA2
7
B3
I/O
24 mA
24 mA
I/O Port, High Power Output, Timer 1 Clock Input
RA3
8
E4
I/O
24 mA
24 mA
I/O Port, High Power Output, Timer 1 Output
RB0
13
F5
I/O
8 mA
8 mA
I/O Port, External Interrupt, Timer 2 Capture 1 Input
RB1
14
F1
I/O
8 mA
8 mA
I/O Port, External Interrupt, Timer 2 Capture 2 Input