74 www.ubicom.com IP2022 Data Sheet 5.9.8 POLYx Registers The five POLYx registers hold the 40-bit polynomial used
in the LFSR operation. 5.9.9 RESx Registers The five RESx registers hold the 40-bit residue used in the
LFSR operation. The ML_OUT bit controls the mapping of
the residue register to the RESx registers, as shown in
Figure 5-19. The residue register can be initialized to all
ones  by  setting  the  SET_RES  bit  in  the  LFSRCFG1
register. 5.9.10    RESCMPx Registers The  four  RESCMPx  registers  hold  a  32-bit  value  for
comparison with the contents of the residue register. After
an LFSR operation is completed, the CMP_RES bit in the
LFSRCFG1  register  indicates  whether  the  result  of  the
operation matched the 32-bit value. When the ML_OUT
bit  in  the  LFSRCFG3  register  is  clear,  bits  39:8  of  the
residue  register  are  compared  against  bits  0:31  of  the
RESCMP register. When ML_OUT is set, bits 0:31 of the
residue   register   are   compared   against   bits   0:31   of
RESCMP.