58 www.ubicom.com IP2022 Data Sheet 5.6.5 Protocol Modes Table 5-3 shows the features which are enabled for each
protocol, as controlled by the PRS3:0 bits in the SxMODE
register.   These   features   affect   which   registers   and register  fields  are  used,  for  example  the  SxRSYNC
register is only  used in the USB and 10Base-T modes.
The  protocol  mode  also  affects  the  signal  usage,  as
shown in Table 5-4. • SxCLK  - Serial Clock in SPI or GPSI Slave modes, optional  external  SERDES  clock  input  for  USB  or
UART modes. • SxRXP  -  Positive-side  differential  input  (USB  only), Slave Select (for SPI Slave), or data valid (GPSI). • SxRXM - Negative-side differential input (USB only). • SxRXD  - Serial data for USB, UART, SPI and GPSI modes (10base-T Ethernet only when comparator is
used). • SxTXPE/SxOE   -  Positive-side  delayed  differential output for pre-emphasis (10base-T Ethernet), output
enable for external transceiver (USB), or data valid for
GPSI mode. • SxTXP  -  Positive-side  differential  output  (10base-T Ethernet and USB modes), or serial data (UART, SPI
and GPSI modes). • SxTXM  - Negative-side differential output (10base-T Ethernet  and  USB  modes),  transmit  clock  (GPSI
Slave), or transmit and receive clock (GPSI Master). • SxTXME  -  Negative-side  delayed  differential  output for pre-emphasis (10base-T Ethernet), or TxBUSY in
GPSI mode. • SxRX+  - Positive-side analog differential input, used for 10base-T Ethernet squelch function. • SxRX- - Negative-side analog differential input, used for 10base-T Ethernet squelch function. Table 5-3  Protocol Features PRS3:0 Mode Encoding Method  Differential or
Single-Ended? Synchronization  Register
Enabled?        EOP
Generation/ Detection?       Bit
Stuffing/ Unstuffing? Pre-Emphasis  Outputs
Enabled? 0000 Disabled None None No No No No 0001     10Base-T   Manchester Differential Yes Yes No Yes 0010 USB Bus NRZI Differential Yes Yes Yes No 0011 UART None Single-Ended No No No No 0101 SPI None Single-Ended No Yes No No 0110 GPSI None Single-Ended No Yes No No Table 5-4  SERDES Protocol Modes And Pin Usage      SERDES
Signal Names SxCLK     SxRXP    SxRXM    SxRXD    SxTXPE SxOE SxTXP     SxTXM   SxTXME   SxRX+ SxRX- SERDES1 Pins RE0 RE1 RE2 RE3 RE4 RE5 RE6 RE7 RG5 RG4 SERDES2 Pins RF4 RF5 RF6 RF7 RF0 RF1 RF2 RF3 RG7 RG6 10Base-T - - -   RXD
Note 1 TxD+ Tx+ Tx- TxD- RX+ RX- USB Bus Optional VP VM RCV OE VPO VMO - - - UART Optional - - RXD - TXD - - - -    SPI
Master SCLK - - DI - DO - - - - Slave SCLK SS - DI - DO - - - -  GPSI
Master - TxEN - TxD RxEN RxD TxCLK/
RxCLK    TxBUSY - - Slave RxCLK RxEN - RxD TxEN TxD TxCLK    TxBUSY - - 1. Used in comparator mode only.