IP2022 Data Sheet
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33
4.1.2
Direct Addressing Mode
Figure 4-1 shows the direct addressing mode used to
reference the special-purpose registers. Seven bits from
the fr field allow addressing up to 128 special-purpose
registers. (Not all 128 locations in this space are
implemented in the IP2022; several locations are
reserved for future expansion.)
Figure 4-1 Direct Mode, Special-Purpose Registers
The following code example uses direct mode.
Figure 4-2 shows the direct addressing mode used to
reference the global registers. This mode is distinguished
from the mode used to access the special-purpose
registers with bit 7 of the fr field. Because these registers
have this additional addressing mode not available for the
other data memory locations, they are especially useful
for holding global variables and frequently accessed data.
Figure 4-2 Direct Mode, Global Registers
Note: Addresses from 0x000 to 0x01F can only be
accessed with Direct mode.
4.1.3
Indirect Addressing Mode
The indirect addressing mode is used when all of the bits
in the fr field are clear. The location of the operand is
specified by a 12-bit pointer in the IPH and IPL registers.
The upper four bits of the IPH register are not used. Figure
4-3 shows indirect mode.
Figure 4-3 Indirect Mode
The following code example uses indirect mode.
mov
w,0x0012 ;load W with the contents of
;the memory location at 0x0012
;(the DATAL register)
515-007a.eps
127
Special-Purpose
Registers
7
0
9-Bit "fr" Field
from Instruction
0
8
0 n n n n n n n
0
7
6
515-008a.eps
127
Global Registers
7
0
9-Bit "fr" Field
from Instruction
0
8
1 n n n n n n n
0
7
6
mov
w,#0x03
;load W with 0x03
mov
iph,w
;load the high byte of the
;indirect pointer from W
mov
w,#0x85
;load W with 0x85
mov
ipl,w
;load the low byte of the
;indirect pointer from W
mov
w,(ip)
;load W with the contents of
;the memory location at
;effective address 0x0385
515-009a.eps
127
Special-Purpose
Registers
3840 Bytes
Data Memory
IPH Register
IPL Register
7
0
n
0
n
7
n n n n n n n
X
3
4
7
X X X n n n
0
9-Bit "fr" Field
from Instruction
0
8
0
0
0
0
0
0
0
0
0
128
Global Registers