104 www.ubicom.com IP2022 Data Sheet 8.2 DC Specifications Operating Temperature -40°C < Ta < +85°C Symbol Parameter Min Typ Max Units Conditions DVdd Digital supply voltage 2.3 2.5 2.7 V AVdd Analog supply voltage 2.3 2.5 2.7 V = DVdd (filters between supplies) GVdd Port G supply voltage 2.3 2.5 2.7 V = DVdd (filters between supplies) XVdd Crystal oscillator supply
voltage 2.3 2.5 2.7 V = DVdd (filters between supplies) IOVdd I/O supply voltage
(except Port G) > DVdd   2.5/3.3 3.6 V Idd Supply current, full operation
DVdd + AVdd + GVdd +
XVdd 150 mA DVdd = 2.3 - 2.7V, 120 MHz CPU core
executing 100% of time (during ISR
and main program code) 70 mA DVdd = 2.5V, 120 MHz CPU core in
ISR only, 30MHz CPU core in main pro-
gram code (Webserver application) IddIO Supply current, full operation
IOVdd only mA IOVdd = DVdd - 3.6V
No loads, no floating inputs Isleep Supply current, sleep
DVdd + AVdd + GVdd +
XVdd µA DVdd = 2.7V, PLL and oscillators off IsleepIO     Supply current, sleep IOVdd only µA IOVdd = 3.6V,
PLL and oscillators off,
No loads, no floating inputs Vih Input high voltage, Port A
through Port F 1.8 5.5 V DVdd = 2.3 - 2.7V,
IOVdd = DVdd - 3.6V Input high voltage, OSC1
and RTCLK1 inputs 1.8 IOVdd V Input high voltage, RST,
TSCK, TSI, and TSS inputs 2.25 5.5 V Vil Input low voltage, Port A
through Port F 1.0 V DVdd = 2.3 - 2.7V,
IOVdd = DVdd - 3.6V Input low voltage, OSC1 and
RTCLK1 inputs 1.0 V Input low voltage, RST,
TSCK, TSI, and TSS inputs 1.05 V Vina Analog input voltage AVdd V See note 1. Iil Input leakage current for
Port A through Port G,
OSC1, RTCLK1, and TSO
pins -1 ±0.01 1 µA Port G = 0V or AVdd (see note 1),
OSC1, RTCLK1 = 0V or IOVdd
All other inputs = 0V or up to 5.5V
OSC1 and RTCLK1 measured in sleep
mode