IP2022 Data Sheet
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91
0x04C
T1CFG1H
Timer 1 configu-
ration register 1
(high byte)
00000000
0x04D
T1CFG1L
Timer 1 configu-
ration register 1
(low byte)
00000000
0x04E
T1CFG2H
Timer 1 configu-
ration register 2
(high byte)
00000000
0x04F
T1CFG2L
Timer 1 configu-
ration register 2
(low byte)
00000000
0x04A
T1CMP1H
Timer 1 Com-
pare 1 register
(high byte)
00000000
0x04B
T1CMP1L
Timer 1 Com-
pare 1 register
(low byte)
00000000
0x044
T1CNTH
Timer 1 counter
register (high
byte, read-only)
00000000
0x045
T1CNTL
Timer 1 counter
register (low
byte, read-only)
00000000
0x056
T2CAP1H
Timer 2 Capture
1 register (high
byte, read-only)
00000000
0x057
T2CAP1L
Timer 2 Capture
1 register (low
byte, read-only)
00000000
0x058
T2CAP2H
or
T2CMP2H
Timer 2 Capture
2 (high byte)
Timer 2 Com-
pare 2 (high
byte)
00000000
0x059
T2CAP2L
or
T2CMP2L
Timer 2 Capture
2 (low byte)
Timer 2 Com-
pare 2 (low byte)
00000000
0x05C
T2CFG1H
Timer 2 configu-
ration register 1
(high byte)
00000000
Table 7-2 Register Addresses and Reset State (contin-
Address
Name
Description
Reset
Value
0x05D
T2CFG1L
Timer 2 configu-
ration register 1
(low byte)
00000000
0x05E
T2CFG2H
Timer 2 configu-
ration register 2
(high byte)
00000000
0x05F
T2CFG2L
Timer 2 configu-
ration register 2
(low byte)
00000000
0x05A
T2CMP1H
Timer 2 Com-
pare 1 register
(high byte)
00000000
0x05B
T2CMP1L
Timer 2 Com-
pare 1 register
(low byte)
00000000
0x054
T2CNTH
Timer 2 counter
register (high
byte, read-only)
00000000
0x055
T2CNTL
Timer 2 counter
register (low
byte, read-only)
00000000
0x01B
TCTRL
Timer 1/2 com-
mon control reg-
ister
00000000
0x00A
W
W register
00000000
0x01C
XCFG
Extended con-
figuration
00000001
Table 7-2 Register Addresses and Reset State (contin-
Address
Name
Description
Reset
Value