64 www.ubicom.com IP2022 Data Sheet The SxTXP and SxTXM pins have high current outputs for
driving  Ethernet  magnetics  directly  without  the  use  of
transceivers. When  the  clock  select  register  is  programmed  with  the
value for 10Base-T, the transmit                                                                                    pre-emphasis
requirement enables the SxTXPE and SxTXME outputs,
which have a 50ns-delayed version of the transmit output
that is resistively combined outside the chip before driving
the magnetics. The  data  encode  block  performs  polarity  inversion,  if
necessary,    then    in    10Base-T    mode    it    performs
Manchester encoding. In USB bus mode, it performs bit
stuffing and then NRZI encoding. Bit stuffing means that
after  six  consecutive  ones,  a  zero  bit  is  inserted.  The
active low SxOE pin is used to enable the USB transceiver
for  transmission.  Otherwise,  this  pin  is  held  high.  For
10Base-T, the output pins of the serializer are driven low
when not transmitting. The encode block is bypassed for
all other protocols. For transmitting, software must specify the number of bits
to transmit and load the data in the SxTBUF register. This
data is then transferred to an internal register, from which
it is serially shifted out to the transmit logic. The TXBE bit in the INTE register can be set to enable an interrupt when
the data has been transferred from the SxTBUF register.
When there is a transmit buffer underrun event (i.e. all of
the data has been shifted out from the internal register, but
the  SxTBUF  register  has  not  been  reloaded),  an  EOP
condition is generated on the SxTXP and SxTXM outputs
after an internal counter decrements to zero. The TXEOP
bit in the SxINTE register can be set to enable an interrupt
when an underrun event occurs. For  protocols  other  than  USB  and  Ethernet,  the  EOP
generator is bypassed. 5.6.1 Protocol Mode Table 5-8 shows the features which are enabled for each
protocol, as controlled by the PRS3:0 bits in the SxMODE
register.   These   features   affect   which   registers   and
register   fields   are   used,   for   example   the   SxRSYNC
register is only used in the USB and 10Base-T modes.
The  protocol  mode  also  affects  the  signal  usage,  as
shown   in   Table   5-9.   Table   5-10   shows   the   clock
frequencies required in the USB and 10Base-T modes. Table 5-8  Protocol Features PRS3:0 Mode Encoding Method  Differential or
Single-Ended? Synchroniza-     tion
Register Enabled?        EOP
Generation/ Detection?      Bit
Stuffing/ Unstuffing? Pre-Emphasis  Outputs
Enabled? 0000 Disabled None None No No No No 0001 10Base-T   Manchester Differential Yes Yes No Yes 0010 USB Bus NRZI Differential Yes Yes Yes No 0011 UART None Single- Ended No No No No 0101 SPI None Single- Ended No Yes No No 0110 GPSI None Single- Ended No Yes No No