50 www.ubicom.com IP2022 Data Sheet 5.0     Peripherals The  IP2022  provides  an  array  of  on-chip  peripherals
needed to support a broad range of embedded Internet
applications: • Watchdog timer • Real-time timer • 2 General-purpose timers with compare and capture
Registers • 2 Serializer/Deserializer (SERDES) units • 10-bit, 8-channel A/D converter • Analog comparator • Parallel slave peripheral interface All of the peripherals except the Watchdog Timer and the
Real-Time Timer  use  alternate  functions  of  the I/O port
pins to interface with external signals. 5.1 I/O Ports The IP2022 contains one 4-bit I/O port (Port A) and six 8-
bit I/O ports (Port B through Port G). The four Port A pins
have  24  mA  current  drive  capability.  All  the  ports  have
symmetrical  drive.  Inputs  are  5V-tolerant  CMOS  levels.
Outputs can use the same 2.3–2.7V power supply used
for the CPU core and peripheral logic, or they can use a
higher voltage (up to 3.6V). The IOVdd pins are provided
for those applications in which a separate power supply is
used  for  the  I/O  port  pin  output  drivers.  Port  G  has  a
separate GVdd pin which can be used to run the Port G
output drivers at a voltage different from that used for the
other ports, since Port G must run from a 2.3–2.7V power
supply. Each  port  has  separate  input  (RxIN),  output  (RxOUT),
and   direction   (RxDIR)   registers,   which   are   memory
mapped. The numbers in the pin names correspond to the
bit positions in these registers. These registers allow each
port bit to be individually configured as a general-purpose
input   or   output   under   software   control.   Unused   pins
should  be  configured  as  outputs,  to  prevent  them  from
floating.    Port    B    has    three    additional    registers    for
supporting external interrupts (see Section 5.1.1). Each port pin has an alternate function used to support
the on-chip hardware peripherals, as listed in Table 5-1.
Port A and Port B support the multi-function timers Timer
1  and  Timer  2.  Port  B,  Port  C,  and  Port  D  support  the
Parallel  Slave  Peripheral  (PSP)  and  external  memory
functions. Port E and Port F support                                                                                                         the
serializer/deserializer  (SERDES)  units.  Port  G  supports
the  analog  to  digital  converter  (ADC)  and  the  analog
comparator.   Before   enabling   a   hardware   peripheral, configure the port pins for input or output as required by
the peripheral.          Table 5-1  I/O Port Pin Alternate Functions
Name    Pin Alternate Function RA0 5 High Power Output, Timer 1 Capture 1
Input (T1CPI1 pin) RA1 6 High Power Output, Timer 1 Capture 2
Input (T1CPI2 pin) RA2 7 High Power Output, Timer 1 Clock Input
(T1CLK pin) RA3 8 High Power Output, Timer 1 Output
(T1OUT pin) RB0 13 External Interrupt, Timer 2 Capture 1
Input (T2CPI1 pin) RB1 14 External Interrupt, Timer 2 Capture 2
Input (T2CPI2 pin) RB2 15 External Interrupt, Timer 2 Clock Input
(T2CLK pin) RB3 16 External Interrupt, Timer 2 Output
(T2OUT pin) RB4 17 External Interrupt RB5 18 External Interrupt, Parallel Slave Periph-
eral HOLD output RB6 19 External Interrupt, Parallel Slave Periph-
eral R/W input RB7 20 External Interrupt, Parallel Slave Periph-
eral CS input RC0 21 Parallel Slave Peripheral Data RC1 22 Parallel Slave Peripheral Data RC2 23 Parallel Slave Peripheral Data RC3 24 Parallel Slave Peripheral Data RC4 25 Parallel Slave Peripheral Data RC5 26 Parallel Slave Peripheral Data RC6 27 Parallel Slave Peripheral Data RC7 28 Parallel Slave Peripheral Data RD0 29 Parallel Slave Peripheral Data RD1 30 Parallel Slave Peripheral Data RD2 35 Parallel Slave Peripheral Data RD3 36 Parallel Slave Peripheral Data RD4 37 Parallel Slave Peripheral Data