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IP2022 Data Sheet
7.3.19 TCTRL Register
TOUTCLR
Override bit to clear the TxOUT output.
This bit always reads as zero.
0 = Writing 0 to this bit has no
effect
1 = Writing 1 to this bit forces the
TxOUT signal low
CPI2CPI1
Internally connect the TxCPI2 input to
the TxCPI1 input. This makes the
TxCPI2 port pin available for general-
purpose I/O.
0 = No internal connection
between TxCPI1 and TxCPI2
1 = TxCPI1 and TxCPI2 internally
connected
CPI2EDG1:0 TxCPI2 edge sensitivity select
00 = Falling edge on TXCPI2 rec-
ognized as capture 2 event
01 = Rising edge on TXCPI2 rec-
ognized as capture 2 event
10 = Any falling or rising edge on
TXCPI2 recognized as cap-
ture 2 event
11 = Any falling or rising edge on
TXCPI2 recognized as cap-
ture 2 event
CPI1EDG1:0 TxCPI1 edge sensitivity select
00 = Falling edge on TXCPI1 rec-
ognized as capture 1 event
01 = Rising edge on TXCPI1 rec-
ognized as capture 1 event
10 = Any falling or rising edge on
TXCPI1 recognized as cap-
ture 1 event
11 = Any falling or rising edge on
TXCPI1 recognized as cap-
ture 1 event
Name
Description
7
6
5
4
3
2
1
0
0
0
T2IE
T1IE
0
0
T2RST T1RST
Name
Description
T2IE
Timer 2 interrupt enable
0 = Timer 2 interrupt disabled
1 = Timer 2 interrupt enabled
T1IE
Timer 1 interrupt enable
0 = Timer 1 interrupt disabled
1 = Timer 1 interrupt enabled
T2RST
Timer 2 reset bit. This bit always reads as
zero.
0 = Writing 0 to this bit has no
effect.
1 = Writing 1 to this bit clears Timer
2.
T1RST
Timer 1 reset bit. This bit always reads as
zero.
0 = Writing 0 to this bit has no
effect.
1 = Writing 1 to this bit clears Timer
1.