Instruction Set Architecture—IP2022 User’s Manual 76 www.ubicom.com Any  bit  at  any  location  in  data memory  can  be  individually  set,
cleared, or tested. All of the bitwise operation instructions take one clock cycle for
execution,  except  in  the  case  of  the  test-and-skip  instructions
when  the  tested  condition  is  true  and  a  skip  occurs.  If  a  skip
instruction is immediately followed by a loadh, loadl, or page
instruction (and the tested condition is true) then two instructions
are  skipped  and  the  operation  consumes  three  cycles.  This  is
useful for skipping over a conditional branch to another page in
which a page instruction precedes a jmp instruction. If several page  or  loadh/loadl  instructions  immediately  follow  a  skip instruction then they are all skipped plus the next instruction and
a cycle is consumed for each. These “extended skip” instructions
are interruptible, so they do not affect interrupt latency. 3.2.6 Data Movement Instructions A data movement instruction moves a byte of data from a data
memory location to either the W register or the top of stack, or it
moves the byte from either the W register or the top of stack to a
data memory location. The location is specified by the “fr” field.
The SPH/SPL register pair points to the top of stack. This stack is
independent of the hardware stack used for subroutine call and
return.