IP2022 User’s Manual—Instruction Set Architecture
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Figure 3-9 shows the format of the jump and subroutine call
instructions. 13 bits of the entry point address are encoded in the
instruction. The remaining three bits come from the PA2:0 bits of
the STATUS register.
Figure 3-9 Jump and Call Instruction Format
Figure 3-10 shows the format of the instructions that clear, set, and
test individual bits within registers. The register is specified by the
“fr” field, and a 3-bit field in the instruction selects one of the eight
bits in the register.
Figure 3-10 Bit Operation Instruction Format
Figure 3-11 shows the format of the remaining instructions.
Figure 3-11 Miscellaneous Instruction Format
15
13
12
0
Opcode
Entry Point Address (“addr13”)
15
12
11
9
8
0
Opcode
Bit
“fr” Field
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Opcode
