System Architecture—IP2022 User’s Manual 52 www.ubicom.com 2.6.1 Brown-Out Detector The on-chip brown-out detection circuitry resets the CPU when
AVdd             dips below the brown-out voltage level programmed in the
BOR2:0 bits of the FUSE1 register. Bits in the FUSE1 register are
flash memory cells which cannot be changed dynamically during
program execution. The device is held in reset as long as AVdd stays below the brown-
out  voltage.  The  CPU  will  come  out  of  reset  when  AVdd  rises
above   the   brown-out   voltage.   The   brown-out   level   can   be
programmed  using  the  BOR2:0  bits  in  the  FUSE  register,  as
shown in Table 2-4.   Table 2-4  Brown-Out Voltage Levels
BOR2:0 Voltage 000 2.30V 001 2.25V 010 2.20V 011 2.15V 100 2.10V 101 2.05V 110 2.00V 111 Disabled