IP2022 User’s Manual—System Architecture www.ubicom.com 45 2.5.5 Disabled Resources If a peripheral is disabled, it does not have the ability to set an
interrupt flag. The interrupt flag, however, is still a valid source of
interrupt. If  software  sets  an  interrupt  flag,  the  corresponding  interrupt
enable  bit  is  set,  and  the  GIE  bit  is  set,  then  the  CPU  will  be
interrupted whether or not the peripheral is enabled or disabled. If  a  peripheral  is  disabled  inside  the  ISR,  then  its  interrupt  flag
must be cleared to prevent a spurious interrupt from being taken
when the ISR completes. 2.5.6 Clock Stop Mode When  a  speed  change  occurs,  it  is  possible  for  the  CPU  clock
source to be disabled. The clock to the CPU core may be disabled
while the system clock is left running, or the system clock may be
disabled  which  also  disables  the  CPU  core  clock.  When  the
system clock is disabled, the interrupt logic continues to function,
and the watchdog timer and real-time timer may be enabled to
keep  running.  (For  minimum  power  consumption  in  clock  stop
mode, disable these timers if they are not needed.) Recovery from clock stop mode to normal execution is possible
from these sources: • External interrupts (i.e. Port B interrupts) • Real-time timer interrupts • Watchdog timer overflow reset