System Architecture—IP2022 User’s Manual 30 www.ubicom.com the  address  held  in  the  ADDRX/ADDRH/ADDRL  register.  The iwritei instruction is identical, except that it also increments the     address     by     2.     For     more     information     about     the iread/ireadi   and   iwrite/iwritei   instructions,    see Section 3.7. 2.3.2 Program Counter The program counter holds the 16-bit address of the instruction to
be executed. The lower eight bits of the program counter are held
in the PCL register, and the upper eight bits are held in the PCH
register. A write to the PCL register will cause a jump to the 16-bit
address  specified  by  the  PCH  and  PCL  registers.  If  the  PCL
register is written as the destination of an add or addc instruction
and carry occurs, the PCH register is automatically incremented.
(This  may  cause  a  mismatch  between  the  PA2:0  bits  in  the
STATUS register and the current program counter, therefore it is
strongly recommended that direct modification of the PCL register
is only used for jumps within a page.) The PCH register is read-
only. The PA2:0 bits in the STATUS register are not used for address
generation, except when a jump or subroutine call instruction is
executed. However, when an interrupt is taken, the PA2:0 bits are
automatically  updated  with  the  upper  three  bits  of  the  interrupt
vector. These bits are restored from the STATUS shadow register
when the interrupt service routine returns (i.e. executes a reti
instruction).