IP2022 Users ManualSystem Architecture
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within the same page. Longer jumps and calls require using a
page instruction to load the upper address bits into the PA2:0 bits
of the STATUS register. The page instruction must immediately
precede the jump or call instruction. The PA2:0 bits should not be
modified by writing directly to the STATUS register, because this
may cause a mismatch between the PA2:0 bits in the STATUS
register and the current program counter (see Section 2.3.2). For
more information about program flash memory, see Section 3.7.
External memory is not shown in Figure 2-3 because the CPU
cannot execute instructions directly out of external memory. For
more information about external memory, see Section 4.11.
2.3.1
Loading the Program RAM
Software loads the program RAM from program flash memory
using the iread/ireadi and iwrite/iwritei instructions.
The iread instruction reads the 16-bit word specified by the
address held in the ADDRX/ADDRH/ADDRL register. This word
can be in program flash memory, program RAM, or external
memory. When the iread instruction is executed, bits 15:8 of the
word are loaded into the DATAH register, and bits 7:0 are loaded
into the DATAL register. The address is a word-aligned byte
address (i.e. an address that is zero in its LSB). The ireadi
instruction is identical to the iread instruction, except that it also
increments the address by 2.
The iwrite instruction writes the 16-bit word held in the
DATAH/DATAL registers to the program RAM location specified by