Register Quick Reference—IP2022 User’s Manual 418 www.ubicom.com C.3.11   SxRCFG Register CLKS1:0 Clock source select 00 =   Clock disabled
01 =   Reserved
10 =   OSC clock oscillator
11 =   PLL clock multiplier Name Description 7 6 5 4 0 Reserved SYNCMP RPOREV RXSCNT4:0 Name Description SYNCMP Synchronization pattern detection disable bit 0 =   Synchronization pattern detection enabled
1 =   Synchronization pattern detection disabled RPOREV Receive data polarity reversal select 0 =   Data polarity uninverted
1 =   Data polarity inverted RXSCNT4:0 Receive shift count, specifies number of bits to receive