IP2022 User’s Manual—Register Quick Reference www.ubicom.com 397 0x06C S1MODE SERDES 1 serial mode/clock select
register 00000000 0x066 S1RBUFH SERDES 1 receive buffer (high byte) Undefined 0x0067 S1RBUFL SERDES 1 receive buffer (low byte) Undefined 0x068 S1RCFG SERDES 1 receive configuration 00000000 0x065 S1RCNT SERDES 1 received bit count
(actual) (read-only) 00000000 0x069 S1RSYNC SERDES 1 receive bit sync pattern 00000000 0x06D S1SMASK SERDES 1 receive sync mask 00000000 0x062 S1TBUFH SERDES 1 transmit buffer (high
byte) Undefined 0x063 S1TBUFL SERDES 1 transmit buffer (low byte) Undefined 0x064 S1TCFG SERDES 1 transmit configuration 00000000 0x060 S1TMRH SERDES 1 clock timer register (high
byte) 00000000 0x061 S1TMRL SERDES 1 clock timer register (low
byte) 00000000 0x07B S2INTE SERDES 2 interrupt enable bits 00000000 0x07A S2INTF SERDES 2 status/interrupt flags 00000000 0x07C S2MODE SERDES 2 serial mode/clock select
register 00000000 0x076 S2RBUFH SERDES 2 receive buffer (high byte) Undefined 0x077 S2RBUFL SERDES 2 receive buffer (low byte) Undefined 0x078 S2RCFG SERDES 2 receive configuration 00000000 Table C-2  Register Addresses and Reset State (continued) Address Name Description Reset
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