IP2022 User’s Manual—System Architecture www.ubicom.com 25 2.1.3 XCFG Register 7 6 5 4 3 2 1 0 GIE FWP RTEOS   RTOSC_EN   INT_EN Reserved FBUSY Name Description GIE Global interrupt enable bit. For more information about inter-
rupt processing, see Section 2.5. 0 =   Interrupts disabled
1 =   Interrupts enabled FWP Flash write protect bit. This bit only affects operation of the
self-programming instructions, not programming through the
ISD/ISP interface. For more information about programming
the flash memory, see Section 3.7. 0 =   Writes to flash memory disabled
1 =   Writes to flash memory enabled RTEOS Real-time timer oversampling bit. For more information about
the real-time timer, see Section 4.3. 0 =   Oversampling disabled
1 =   Oversampling enabled RTOSC_EN    RTCLK oscillator enable bit 0 =   RTCLK oscillator is operational
1 =   RTCLK oscillator turned off