IP2022 User’s Manual—Register Quick Reference www.ubicom.com 393 0x072 S2TBUFH SERDES 2 transmit buffer (high
byte) Undefined 0x073 S2TBUFL SERDES 2 transmit buffer (low byte) Undefined 0x074 S2TCFG SERDES 2 transmit configuration 00000000 0x075 S2RCNT SERDES 2 received bit count
(actual) (read-only) 00000000 0x076 S2RBUFH SERDES 2 receive buffer (high byte) Undefined 0x077 S2RBUFL SERDES 2 receive buffer (low byte) Undefined 0x078 S2RCFG SERDES 2 receive configuration 00000000 0x079 S2RSYNC SERDES 2 receive bit sync pattern 00000000 0x07A S2INTF SERDES 2 status/interrupt flags 00000000 0x07B S2INTE SERDES 2 interrupt enable bits 00000000 0x07C S2MODE SERDES 2 serial mode/clock select
register 00000000 0x07D S2SMASK SERDES 2 receive sync mask 00000000 0x07E CALLH Top of call stack (high byte) 11111111 0x07F CALLL Top of call stack (low byte) 11111111 Table C-1  Register Addresses and Reset State (continued) Address Name Description Reset
Value