IP2022 User’s Manual—In-System Programming www.ubicom.com 365 PIN2:0 Specifies PLL clock multiplier prescaler divisor. 000 =   1
001 =   2
010 =   3
011 =   4
100 =   5
101 =   6
110 =   7 111 =   8 WUDP2:0 Specifies suspend time for system clock during PLL startup
(after a speed instruction clears the PLL bit in the SPDREG
register).
000 = 128 µs 001 = 192 µs 010 = 320 µs 011 = 576 µs 100 = 1.088 ms 101 = 2.112 ms 110 = 4.160 ms 111 = 8.256 ms Name Description