In-System Programming—IP2022 User’s Manual 362 www.ubicom.com command) of the IP2022. The configuration block must then be
restored after erasure. If code protection is enabled (i.e. the CP bit in the FUSE1 register
is   clear),   bulk   erase   twice   with   the   address   pointer   set   to
0x00000000, then bulk erase once with the address pointer set to
0x00010000 to erase the configuration block. The FUSE0, FUSE1, and TRIM0 registers hold bits that affect the
hardware    operation    of    the    IP2022.    All    other    bits    in    the
configuration   block   have   functions   established   by   software
convention, which may affect the operation of the debugger/programmer and software development tools. Table 6-1  Configuration Block Address Words Name Description 0x00010000 1 FUSE0 FUSE0 register 0x00010001 1 FUSE1 FUSE1 register 0x00010002- 0x00010003 2 - Reserved 0x00010004 1 TRIM0 TRIM0 register 0x00010005- 0x0001001D 9 - Reserved 0x0001001E- 0x0001001F 2 FREQ OSC1 input
frequency during
device program-
ming