In-System Debugging—IP2022 User’s Manual 350 www.ubicom.com ment that the voltage range supplied be limited to 2.3 to 3.6V.
The voltage and current capabilities of the IOVdd supply from
the debugger/programmer must be published by the vendor.
TRST  (Target  Reset)—Initializes  the  IP2022  into  a  known
state. The debugger/programmer may provide a 100-ms sys-
tem reset signal (TRST) to the target system. If supported, the
TRST output must be an open-collector driver to accommo-
date other sources of reset in the target system. The minimum
source requirement for this driver is 6 mA.
The circuit under test may use the TRST signal to reset the en-
tire  system,  to  reset  only  the  IP2022,  or  it  may  ignore  the
TRST signal.
Driving  the  TRST  signal  low  does  not  guarantee  that  the
IP2022 has been reset. The debugger/programmer must is-
sue a DEBUG_RESET or RESET_ALL command to ensure
that the IP2022 is reset.
The debugger/programmer should not detect or be reset by
the TRST signal being driven low by the target system. There
is no requirement that the IP2022 is connected to the TRST
signal, so the debugger/programmer cannot assume that the
IP2022 has been reset if the target system pulls the TRST pin
low.
OSC (Target Clock Oscillator)—If the debugger/programmer
is capable of supplying an OSC clock for the target system,
then it must be configurable so that the clock can be disabled
to prevent it from interfering with the target system (i.e. the
OSC clock output is placed in a high-impedance state).