5.0 IP2022 User’s Manual 327 In-System Debugging The IP2022 provides on-chip hardware for interface to debugging
tools.  This  eliminates  any  need  for  special  “bond-out”  chips  for
software development, which may not share the exact electrical
characteristics of the target chip used for high-volume production.
By providing a debugging facility that works with the target chip
installed in the actual system being developed, the risk of minor
incompatibilities turning into major production delays is eliminated. The in-system debugging (ISD) hardware provides the following
capabilities: • Basic control of processor in a target system such as reset
and reading device ID. • Visibility of all chip registers and the ability to modify their con-
tents. • Ability to set and clear breakpoints. • Single-step, run, and stop operations. An  industry-standard  SPI  bus  is  used  for  in-system  debugging.
The  SPI  bus  is  also  used  for  in-system  programming  (ISP),  as
described in Chapter 6. The dedicated SPI bus is not available for
any other uses. If an application requires an SPI bus for another
purpose,   the   two   serializer/deserializer   (SERDES)   units   are
available for implementing SPI, or other popular serial interface
standards.