IP2022 User’s Manual—Peripherals www.ubicom.com 315 4.9.4 DATAIN Register The 8-bit DATAINH and DATAINL registers together comprise the
16-bit     DATAIN     register.     For     LFSR0     and     LFSR2,     the
AUTOLOAD_EN  bit  in  the  LFSRCFG3  register  can  be  used  to
enable   automatic   loading   from   SERDES1.   For   LFSR1   and
LFSR3, the AUTOLOAD_EN bit in the LFSRCFG3 register can be ML_OUT Specify shift direction of the residue register, mapping
of the residue register to the RESx registers, and map-
ping of the residue register to the RESCMP compara-
tor 0 =   Data is shifted into MSB and out of LSB
1 =   Data is shifted into LSB and out of MSB ML_IN Specify shift direction of DATAIN register to DIN node 0 =   Data is shifted LSB-first to DIN
1 =   Data is shifted MSB-first to DIN HL_TRIGGER Specify trigger condition for starting LFSR operation 0 =   Trigger on loading DATAINL (low byte)
1 =   Trigger on loading DATAINH (high byte) FB3_D0_EN Enable FB3 signal in source gating for D0 node 0 =   FB3 is not used
1 =   FB3 is XORed with other enabled inputs FB4_D0_EN Enable FB4 signal in source gating for D0 node 0 =   FB4 is not used
1 =   FB4 is XORed with other enabled inputs Name Description