IP2022 Users ManualSystem Architecture
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The IP2022 has a mechanism for in-system programming of its
flash and RAM program memories through a four-wire SPI
interface. This provides easy programming and reprogramming of
devices on assembled circuit boards. In addition, the flash
memory can be programmed by software at run time, for example
to store user-specific data such as phone numbers and to receive
software upgrades downloaded over the Internet. The IP2022 also
has an on-chip debugging facility which makes the internal
operation of the chip visible to third-party debugging tools.
2.1
CPU Registers
Figure 2-1 shows the CPU registers, which consist of seven 8-bit
registers, seven 16-bit registers, and one 24-bit register. The 16-
bit registers are formed from pairs of 8-bit registers, and the 24-bit
register is formed from three 8-bit registers. See Appendix C for a
complete list of CPU and peripheral registers.