Peripherals—IP2022 User’s Manual 310 www.ubicom.com The LFSR registers do not support consecutive read-modify-write
operations. For example, the following instruction sequence loads
unpredictable values: clrb lfsrh,7
clrb lfsrh,4 4.9.1 LFSRCFG1 Register 7 6 5 4 3 0 Reserved    SET_RES DONE CMP_RES SHIFT_COUNT3:0 Name Description SET_RES Set all bits in residue register (write only) 0 =   No effect (this bit always reads as 0)
1 =   Set all bits DONE LFSR operation complete (read only) 0 =   LFSR unit busy
1 =   Last operation has completed CMP_RES Residue register comparison bit (read only) 0 =   Last LFSR operation result did not match           contents of RESCMP register
1 =   Last result matched RESCMP contents SHIFT_COUNT3:0 LFSR operation shift count. Load this field with N for
an operation of N+1 shifts.