IP2022 User’s Manual—Peripherals
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297
4.7.2
ADC Result Justification
The 10 bits of the ADC value can be mapped to the 16 bits of the
ADCH/ADCL register pair in three different ways, as shown in
Table 4-10. In this table, the numbers in the cells represent bit
positions in the 10-bit ADC value, Z represents zero (as opposed
to bit position 0), and -9 represents the inversion of bit position 9.
Table 4-11 Justification of the ADC Value
Mode
ADCH Register Bits
ADCL Register Bits
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Left
Justified
9
8
7
6
5
4
3
2
1
0
Z
Z
Z
Z
Z
Z
Right
Justified
Z
Z
Z
Z
Z
Z
9
8
7
6
5
4
3
2
1
0
Signed
-9 -9 -9 -9 -9 -9 -9
8
7
6
5
4
3
2
1
0
